1. Field of the Invention
The present invention relates to a semiconductor integrated-circuit device including a sense amplifier formed on a semiconductor substrate.
2. Related Art
One known sense amplifier of a non-volatile memory such as a flash memory is a single-ended sense amplifier disclosed in Japanese Unexamined Patent Application Publication No. 8-63984.
In the conventional art, the above construction allows a direct current to flow between a memory cell transistor and a load transistor, thereby increasing a consumption current.
The present invention has been developed in view of the above problem, and one advantage of the present invention is to reduce the power consumption in a semiconductor integrated-circuit device having a sense amplifier
To solve the problem described above, a semiconductor integrated-circuit device in accordance with one embodiment of the present invention having a memory element and a sense amplifier circuit, includes an inverter amplifier including an inverter circuit and a first N-type, MOS transistor for receiving, at a gate thereof, an output signal from the inverter circuit, with a drain of the first N-type MOS transistor connected to an input of the inverter circuit, reference current generator means, a first P-type MOS transistor for receiving a signal from the reference current generator means, a second P-type MOS transistor which is connected in series with the first P-type MOS transistor and receives an output of the inverter amplifier at the input gate thereof, a third P-type MOS transistor connected in parallel with the first and second P-MOS transistors, and a second N-type MOS transistor for opening a current path to ground potential during a precharge operation.
In the above semiconductor integrated-circuit device, the memory element includes a non-volatile memory.
In the semiconductor integrated-circuit device a direct current required in a read operation from a memory element during precharging is cut off by the N-type MOS transistor, and a direct current during a read operation from a memory cell is cut off by the P-type MOS transistor. The direct current is cut off at the end of the read operation, and a duration of time during which the current flows remains constant. When an operation frequency drops, the direct current, which conventionally flows during an active period of the sense amplifier, is substantially reduced, thereby greatly lowering current consumption.
In accordance with a second embodiment of the present invention, a semiconductor integrated-circuit device having a memory element and a sense amplifier circuit includes reference current generator means, a first P-type MOS transistor for receiving a signal from the reference current generator means, a second P-type MOS transistor connected in series with the first P-type MOS transistor, a third P-type MOS transistor for precharging, connected in parallel with the first and second P-type MOS transistors, and an inverter circuit to which drains of the second and third P-type MOS transistors are connected, wherein an output of the inverter circuit is fed to a gate of the second P-type MOS transistor.
In the semiconductor integrated-circuit device, the memory element includes a non-volatile memory.
In the semiconductor integrated-circuit device a direct current in a read operation from a memory element is cut off by the P-type MOS transistor. The direct current is cut off at the end of the read operation, and a duration of time during which the current flows remains constant. When an operation frequency drops, the direct current, which conventionally flows during an active period of the sense amplifier, is substantially reduced, thereby greatly lowering current consumption.
In accordance with a third embodiment of the present invention, a semiconductor integrated-circuit device having a memory element and a sense amplifier circuit, includes an inverter amplifier including an inverter circuit and a first N-type MOS transistor for receiving, at a gate thereof, an output signal from the inverter circuit, with a drain of the first N-type MOS transistor connected to an input of the inverter circuit, a second N-type MOS transistor which is connected in series with a source of the first N-type MOS transistor with the source thereof connected to a ground line, and a first P-type MOS transistor for precharging, wherein the second N-type MOS transistor receives, at a gate thereof, a signal identical to a gate input signal to the first P-type MOS transistor.
In the semiconductor integrated-circuit device, the memory element includes a non-volatile memory.
In the semiconductor integrated-circuit device a direct current required in a read operation from a memory element during precharging is cut off by the N-type MOS transistor, and the current consumption is substantially reduced.
In accordance with a fourth embodiment of the present invention, a semiconductor integrated-circuit device of the present invention having a memory element and a sense amplifier circuit includes an inverter amplifier including an inverter circuit and a first N-type MOS transistor for receiving, at a gate thereof, an output signal from the inverter circuit, with a drain of the first N-type MOS transistor connected to an input of the inverter circuit, reference current generator means, a first P-type MOS transistor for receiving a signal from the reference current generator means, a second P-type MOS transistor for precharging, connected in parallel with the first P-type MOS transistor, and a second N-type MOS transistor connected in series with a source of the first N-type MOS transistor, wherein a source of the second N-type MOS transistor is connected to a ground line and the second N-type MOS transistor receives, at a gate thereof, a signal identical to a gate input signal to the second P-type MOS transistor.
In the semiconductor integrated-circuit device, the memory element includes a non-volatile memory.
In the semiconductor integrated-circuit device a direct current required in a read operation from a memory element during precharging is cut off by the N-type MOS transistor, and the current consumption is substantially reduced,